lscpu - ARMv7 rev 5

Return To ARMv7 rev 5 System Information

Architecture:          armv7l
Byte Order:            Little Endian
CPU(s):                8
On-line CPU(s) list:   0-5
Off-line CPU(s) list:  6,7
Thread(s) per core:    1
Core(s) per socket:    3
Socket(s):             2

Return To ARMv7 rev 5 System Information